// VGA Module for Pac-Man game
// ecen3233 Final Project Phase-II
// Adapted from David Fritz by Jun Chen (Spring-08)
// Final Modifications by Harsha Choday and Aaron Arneson (Spring-09)


module vga (out_red, out_green, out_blue, hsync, vsync, rda, clk, reset, data);
   
  // input clk,red,green,blue; //single wire inputs
   input clk, reset;
   input	[31:0] data;
	output [31:0] rda;
   output reg out_red, out_green, out_blue, hsync, vsync; //single wire outputs
   
   
   //internal regs and wires
   reg	h,v,vonh,vonv;
   reg 	[9:0] hcount,vcount;
   reg	red, green, blue;
   reg 	toggle;
   reg 	[8:0] row,column; //16-bit position outputs
	wire  von, clk_b;
	
   initial
     begin
	toggle <= 1'b0;
	hcount <=10'b0;
	vcount <=10'b0;
     end
   
   
   //video should only be on when rgb data is displayed
   assign von = vonh & vonv;
   
	
	always @(posedge clk)
   begin	
			if (hcount == 799) 
			  hcount <= 0;
			else
			  hcount <= hcount + 1;

			// h = 1 implies generating the hsync signal
			if (hcount < 756 && hcount > 658) 
			  h <= 0;
			else 
			  h <= 1;	 

			//increment vcount only after all hsyncs	
			if (vcount > 523 && hcount > 698)	  
			  vcount <= 0;
			else if (hcount == 699)
			  vcount <= vcount + 1;
			
			if (vcount < 495 && vcount > 492)
			  v <= 0;
			else
			  v <= 1;
			
			if (hcount < 320) begin
				vonh <= 1;
				column <= hcount;
			end else 
			  vonh <= 0;
			
			if (vcount < 200) begin
				vonv <= 1;
				row <= vcount;
			end else
			  vonv <= 0;
			
			// Generate Hsync and Vsync signals
			hsync <= h;
			vsync <= v;
			
			out_red <= red & von;
			out_green <= green & von;
			out_blue <= blue & von;
	
	
   end // always @ (posedge clk)


	// Generate read address for dmem_2p
	
	assign rda = row*40+column/8;   
		
	
	
	// Post-process the data received from Dmem
	// The word is broken up into pixels

	always @(posedge clk)  // state register
   begin
		   red   <= data[30-(column%8)*4]; 
		   green <= data[29-(column%8)*4];
		   blue  <= data[28-(column%8)*4];
			  
	end // always
	  
	  
endmodule // vga



// Joystick interface module
module joystick(input reset, input up, right, down, left,
                output reg [3:0] direction);
	
   always @(reset or up or right or down or left)
     begin
	if(reset)
	  direction<=4'b0000;
	else if (up)
	  direction<=4'b0001;
	else if (right)
	  direction<=4'b0010;
	else if (down)
	  direction<=4'b0100;
	else if (left)
	  direction<=4'b1000;
	else 
	  direction<=4'b0000;
     end // always @ (reset or up or right or down or left)   

endmodule // joystick