module fsm (X, clk, Z);

   input  X;
   input  clk;

   output Z;   
   reg 	  Z;

   // Choose your recommended encoding
   parameter [1:0] 
		   S0 = 2'b00,
		   S1 = 2'b01,
		   S2 = 2'b10,
		   S3 = 2'b11;
   
   reg [1:0] 	   CURRENT_STATE;
   reg [1:0] 	   NEXT_STATE;
   
   always@ (posedge clk)
     
     begin
	CURRENT_STATE = NEXT_STATE;	
     end
   
   always@ (CURRENT_STATE or X)
     
     begin
	
	case(CURRENT_STATE)	  
	  S0:
	    begin
	       if (X == 1'b0)
		 begin
		    Z = 1'b0;		 
		    NEXT_STATE=CURRENT_STATE;
		 end	  
	       else
		 begin
		    Z = 1'b0;
		    NEXT_STATE = S1;
		 end
	    end // case: S0	  
	  S1:
	    begin
	       if (X == 1'b0)
		 begin
		    Z = 1'b0;		 
		    NEXT_STATE = CURRENT_STATE;
		 end
	       else
		 begin
		    Z = 1'b0;
		    NEXT_STATE = S2;		 
		 end
	    end // case: S1	  
	  S2:
	    begin	       
	       if (X == 1'b0)
		 begin
		    Z = 1'b0;		 
		    NEXT_STATE = CURRENT_STATE;
		 end
	       else
		 begin
		    Z = 1'b0;
		    NEXT_STATE = S3;		 
		 end
	    end // case: S2	  
	  S3:
	    begin
	       if (X == 1'b0)
		 begin
		    Z = 1'b0;		 
		    NEXT_STATE = CURRENT_STATE;
		 end
	       else
		 begin
		    Z = 1'b1;
		    NEXT_STATE = S0;		 
		 end
	    end // case: S3	  
	endcase // case(CURRENT_STATE)		
     end // always@ (CURRENT_STATE or X)
   
endmodule // fsm