Daily Calendar

Course Week	Lecture Slides	Supplemental Material	Assigned Text	Lab Assignment	Tutorials	Weekly Quiz	Comments
Week 1	Combinational Logic: Intro		Katz: Ch. 1.1-1.4	No Lab	Installing XILINX ISE 8.2i
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Week 2	Combinational Logic	Combinational Logic Supplemental Slides	Katz: Ch. 2.1-2.4	Lab Intro and Full Adder	Using XILINX Tutorial FPGA Tutorial		The following example illustrates the Uniting Theorem
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Week 3	Working with Combinational Logic	Combinational Logic Supplemental Slides II	Katz: Ch. 2.5	No Lab	Logic Analyzer Tutorial		The following example illustrates using Karnaugh Maps
	"		Katz: Ch. 3.1-3.6
Week 4	Combinational Logic Technology	Combinational Logic Supplemental Slides III	Katz: Ch. 4.1-4.4	N-bit Adder with FPGA	Seven Segment Module	D2L Quiz
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Week 5	Exam I Review Slides			Logic Analyzer	StateCAD Tutorial	D2L Quiz	The following example illustrates building a State Machine

Week 6	Intro to Sequential Logic	Intro to Flip-Flops and Registers	Katz: Ch. 6.1	Direction Finder		D2L Quiz
			Katz: Ch. 6.3
Week 7	Sequential Timing		Katz: Ch. 6.2	Calculator	VGA Module Tutorial	D2L Quiz

Week 8	Finite State Machines		Katz: Ch. 7.1-7.4	No Lab		D2L Quiz

Week 9	Finite State Machine Optimization		Katz: Ch. 8.1-8.3	Final Project: Phase One
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Week 10	Finite State Machine Optimization II					D2L Quiz

Week 11	Exam II Review Slides			Final Project: Phase Two

Week 12	Memory		Katz: Ch. 10.4

Week 13	FPGA and CPLD		Katz: Ch. 9.3-9.4	Final Project: Phase Three

Week 14	Final Exam Review Slides

Week 15

Week 16